MKS-40 Panel PCB

Overview There are 5 control boards in the original Jupiter 4 (named A, B, C, D , E , F) which I have merged into one 400mm wide PANEL PCB, except for control board D which is deleted from the design.

Control Board A This contains the arpeggiator controls and the LFO delay and bend. None of these pots and switches are read by the 8048 or retained in patches. Changes in the MKS-40:

  • Arpeggiator Rate pot moved to the lower right
  • Arpeggiator INT/EXT switch deleted (MIDI controlled)
  • VCF Mod INT/EXT deleted (MIDI controlled)
  • The MIDI CV interface provides an external MIDI clock for the arpeggiator
  • VCF MOD slider moved into the VCF group
  • LFO Delay retained with a Jupiter 8 LFO design
  • 4 octaves of keyboard scanning
  • LFO bend range deleted

Control Board B and C All functionality on these two boards has been retained, with a PIC microcontroller decoding a slide potentiometer into 2 bit binary for the Pulse Width and Key Follow features. These 8-pin PIC’s are on the Panel board.

Control Board D All functionality on this board has been deleted (bender), except portamento, as we now have a MIDI interface for pitch bend etc. The portamento pot and ON/OFF switch is on the lower right of the new front panel.

The 4-way Switch Challenge Finding suitable DP4T slide switches has proven difficult, so I have replaced them with 4-position slide potentiometers just like in the Juno 106. A small 8-pin PIC12LF1552 reads the pot and converts it into 2-bit binary which interfaces straight into the 8048 via the 4051’s. This is needed for VCF Key Follow and VCO Pulse Width, the LFO waveform control uses a rotary switch to drive a 4052 analog switch, instead of using a 4-way toggle switch.

Control Board E This board controls the arpeggiator and keyboard modes, along with switching the chorus ON/OFF and a hold button to keep all gates and therefore notes  ON. There are four arpeggiator modes (UP, DOWN, UP/DOWN, RANDOM) which are selected by interlocking push buttons.

I have implemented Jupiter 8 style momentary buttons and LED’s, and a new PIC microcontroller debounces these switches and drives the ASSIGNER 8048-11 to simulate the interlocking of these two banks of 4 switches. This is possible as the 8048-11 is not using a diode matrix scanning approach.

The ENSEMBLE switch goes directly to the chorus PCB, so I only need to implement a hardware debounce using a MX chip. The hold feature has been deleted, but is available over MIDI.

Control Board F This board controls the user patches and factory presets, as well as WRITE and MANUAL modes. I have implemented Jupiter 8 style momentary buttons and LED’s, and a new PIC debounces these switches and drives the main 8048-12 processor, and a new FRAM chip for patch selection.

It also drives a dual 7 segment display to show patch number (11 to 88 – 64 patches in total). The patch selection works exactly like in the Jupiter 8 – press one button to select the bank (1-8), the decimal points flash, then press a second button for the second digit that selects the patch within the bank (1-8).

The WRITE and MANUAL buttons are also read by the PIC. MANUAL mode enables the pots and switches to be varied and the results programmed back into RAM by the writing into a user preset. A user preset cannot be varied until MANUAL is pressed. The PIC reads the button press and drives the 8048 data lines directly.

The Jupiter 4 uses 4066 CMOS switches to create an interlocked WRITE duration of 1.2 seconds, which is initiated by having the WRITE button pressed along with a PATCH button. The write is   interlocked with the MEMORY PROTECT switch and any user patch button. In the MKS-40 the PIC recreates the write duration and interlock, removing the need for another chip, resistors and the timing capacitor.

The PIC also addresses the new FRAM chip, When user presets above 18 are selected the additional FRAM address lines from A8 – A10 are used to harness the larger memory.  The extra 3 bits  of addressing gives 8 times the original memory which is used to store banks 2-8. Only 8k of the total 64kb of the FRAM chip are used due to the self imposed limit of 64 patches and the 4-bit data lines used by the 8048 processor. 8kb FRAM is only available with a serial interface, which would mean re-engineering the 8048.

The original 10 presets held in the 8048 ROM are inaccessible, as I have deleted the preset buttons! I have replicated theses presets in upper patch memory (Patch 77, 78, 81, 82, 83, 84, 85, 86, 87, 88) as the exact data values are recorded in the service manual. There are also a set of 54 new patches programmed into the remaining free memory slots.

PIC Design The Patch Preset PIC carries out a number of simple tasks but needs a total of 46 I/O Pins;

  • Front Panel Buttons 10x
  • Memory Protect Switch 1x
  • Front Panel LED’s 10x
  • 8048 data lines 12x
  • Dual 7 segment display 10x
  • FRAM address lines 3x

This has to be reduced to enable a 40-pin THD PIC to be used. A couple of I2C I/O Expanders drive 8 of the button LED’s and the segments in the dual display. This reduces the I/O pin count down to pin count to 34 but means writing a bit more software.

The 8048-12 is scanning the patch and preset switches using a diode matrix so I have used 4066 analog switches to interface the PIC rather than going into the data lines directly.



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